Due date

Due into the locker by Sunday, January 17, at 11:55pm

Lab Objective

Welcome to CE12L!

This is the first lab of three that uses the Multimedia Logic (MML) application by Softronix in Windows. MML is a free schematic entry and simulation tool, so you can download it and install it at home as well, if you wish. You will use MML to build some simple circuits, developing your circuit-building intuition!

Note: Do not visit the Softronix Website as it is labeled as an unsafe page. It may be infected with malware and may harm your computer. Use the link provided above instead.

You are expected to finish part A of this lab during the first lab section day, and parts B and C during the second lab section.

This lab assignment is worth 32 points. Of these, 20 points are on the lab itself, and 12 points are on the lab report which you will submit.

Lab tutors: Go over these topics

Your lab tutor will cover the following topics in the first 40 minutes of lab.

  • Introductions
  • When labs are due
  • What's required when submitting a lab: submitting the lab files and a detailed lab report (More...)
  • How to use sum of products to go from a 3-input, 1-output truth table to logic gates

    Warm-up: Multimedia Logic

    Multimedia Logic (MML) allows you to build logic gates and connect them together. In the warm-up, you will read the tutorial and get familiar with the basic logic elements on the palette.

    What's required

    You must submit lab1_warmup.lgi into the lab locker. A report is not required for this portion of the lab; we are learning the commands to submit into the lab locker.

    Procedure: Tutorial

    1. Start the Multimedia Logic (MML) tool. You can find it in F:\Class Folders\Computer Engineering\CE 12L\Mulimedia Logic. The executable is called Mmlogic.exe.
    2. Run the tutorial. Go to Help>Tutorial. This tutorial will walk you through building and simulating a simple circuit. Use the text tool to put your name, lab section, date, and lab number on your schematic. Save the resulting schematic as lab1_warmup.lgi.
      • If you are in BE109 or other IT lab, save the schematic in X:, your mounted drive on the UCSC file system. That way, you can access your project later. All files left on the lab computer are deleted as soon as you log out. If you are in another lab, remember to transfer your files to your home directory when you are done.
      • Create a directory especially for CE12. Create another one especially for lab 1. Save your schematic in there.

    Procedure: De Morgan's Laws

    Now, experiment with the logic gates by showing De Morgan's Laws in action. Save the resulting schematic as lab1_demorgans.lgi and submit it when you are done.

    1. Connect two switches to an AND gate. Connect the output of the AND gate to an LED. See what happens on the output when you change the inputs. Figure shows how to add a switch from the palette.
      switch
      Figure : Adding a switch from the palette
    2. Now, add an an inverter between the switch and the AND gate for each input. Refer to Figure 1.
      AND gate
      Figure 1: AND gate with inverted inputs
    3. Connect the same two inputs to an OR gate and corresponding LED. Change the OR gate to a NOR gate: Right-click on the OR gate, select Properties, and choose "Invert Output (NOR)." Refer to Figure 2.
      invert outputs
      Figure 2: Inverting the outputs for a two-input OR gate to create a NOR gate
    4. Demonstrate De Morgan's Laws by running the circuit simulation and seeing that the two LEDs show the same output.
  • Submit lab1_warmup.lgi and lab1_demorgans.lgi into the class locker.

    Lab 1, Part A: Sequential logic

    Now we're ready to start!

    Implement the truth table shown in Figure 1. You may use and, or, and not (inverter) gates.

    What's required

    You must submit lab1_a.lgi and the associated lab report into the lab locker. You may submit just one lab report for the two-part lab assignment below. That is, your lab report may contain documentation relating to both parts (a) and (b).

    In particular, your design must

    In addition to the standard things a lab report has, your lab report must

    A B C OUT
    0 0 0 0
    0 0 1 1
    0 1 0 0
    0 1 1 0
    1 0 0 0
    1 0 1 0
    1 1 0 1
    1 1 1 1
    Figure 1: Truth table to implement for part A

    Procedure

    Following these steps may help you get started.

    1. Work out the logic needed to obtain the TRUE (1) output OUT from the three inputs A,B,C on a piece of paper.
    2. Open a new file in MML, and save it as lab1_a.lgi.
    3. Add your name, lab section, date, and lab number to your design using the text tool.
    4. For the three inputs A,B,C add three switches.
    5. For the one output, OUT, add an LED. If you visit the properties of the LED, you can change its color!
    6. Add the logic you designed in step 1 to connect the switches to the LED.
    7. Test your design by trying each of the combinations of inputs and watching for the expected behavior (will the light turn on?).
    8. Document your steps in the lab report.
    9. Count the number of transistors your design took. Figure 3 shows the logic gate to transistor conversion. Document the number of transistors in your lab report.
    10. Show your lab to your tutor for a checkoff (optional).
    11. Submit your lab and report to the course locker.
    2-input gate Transistors
    AND 6
    OR 6
    NOT 2 (1-input only)
    NAND 4
    NOR 4
    XOR +/-14
    Figure 3: Number of transistors needed for each two-input gate. Additional inputs require 2 more transistors each, per gate.

    Lab 1, Part B: Optimization

    Optimize the circuit you designed in part (a) above for speed and user-friendliness.

    What's required

    Submit lab1_b.lgi and the associated lab report into the lab locker. You may submit just one lab report for the two-part lab assignment. That is, your lab report may contain documentation relating to both parts (a) and (b).

    In particular, your design must implement the truth table shown in Figure 1, but with the following changes.

    In addition to the standard things a lab report has, in your lab report, you must

    keypad
    Figure 4: Keypad element

    Grading template

    Logic design requirements

    This is a suggested grading rubrik. Your tutor may or may not use this rubric to grade by, but it is a good general guideline before submitting your lab to check off these points.

    Lab write-up requirements

    In the lab write-up, we will be looking for the following things. The lab report is worth 12 points. We do not break down the point values; instead, we will assess the lab report as a whole while looking for the following content in the report.