CMPE 202 - Computer Architecture - Fall 2004
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Homeworks (individually)

Homeworks should given before 06:00PM of the assigned day. Drop a printed version at my office. If I am not there, place it under the door.

Paper Review (individually)

Drop it in my office before 06:00PM of the assigned day.

Choose two papers from paper list. You can choose another paper as long as it has been published on MICRO, ISCA, or ASPLOS. The review must include the following sections: (1-2 pages total)

  • Paper title and your name
  • Provide a short summary of the paper
  • What is the strenght? (important)
  • What is the weakness? (important)
  • Provide comments in ways that the paper can be improved
  • Talk about related work published more recently (1-2 paragraphs only)
  • If you choose anothe paper that it is not in the list, add a printed version of the paper

Setup (individually)

Compile SESC, create a resonable configuration file for a SINGLE processor, and run 4 SPECints, 2 SPECfps, and 2 splash benchmarks.
Get SESC from sourceforge. The precompiled benchmarks are required for doing simulations. If you need to compile new application, you can get the new sescutils infraestructure.
  • I want everybody to keep using the cvs server. At the end of the project, code modifications should be consistent with the latest mainline version. Otherwise, the project will not be accepted.
The report should include (1 page + dump configuration + output report.pl):
  • A justification of the parameters choosen. Group justifications, and try to be short
  • A justification for the benchmarks choosen and the input set selected
  • The output of report.pl

Projects (individually/group)

Projects should be done either individualy or in groups of two. I will accept bigger groups only if the tasks are very clearly divided (talk to me).
Projects have four major parts:
  • Project description: A one page document explaining the main objective of the paper. It should included a clear roadmap. The roadmap includes tasks and who does them.
  • Project presentation: 3-4 minutes powerpoint/keynote/latex presentation per each group member (around 5 slides).
  • Project Documentation: A 4-6 pages two column 11pt font size single space. LaTeX should have a baselinestretch of 1 and article format. The document should have an introduction, related work, experimental setup, evaluation, and conclusions.
  • Project Source: Handle a tar with all the code modifications. The source tree must be consistent with the latest mainline version. Otherwise, the project will not be accepted. Remember to read docs/README.codingStyle.
List of possible projects (open to other proposals):
  • SESC Validation (G4, G5, simplescalar,...)
  • Special pipeline for branch instructions (Talk to me about details)
  • Thermal model on SESC
  • New Branch Prediction
    Implement a new type of branch predictor: multiple branch histories, RAP (talk to me about this project)
  • A generic hardware support for debugging. CPU non-instrusive support for generating traces like in valgrind. (Talk to me about details)
  • Importance of modeling bandwidth. Many papers do not report memory bandwidth or MSHR entries. Collect published paper statistics, and model non-intuitive/interesting cases where this is very important. Run simulations on SESC and multiscalar
  • GCC pass to reduce the number of branches. Transform branches to arithmetic operations when possible. Run simulations in native and SESC
  • Statistical simulation. Implement statistical simulation on SESC. (Talk to me about details)
  • Fault-tolerant TLS (Thread-Level Speculation). (Talk to me about details)
  • Clustered architectures:
    • Remove the LDST queue, and move it to cache. Each cluster has a local cache, so some sort of coherence is required
    • Implement different steering algorithms
  • Benchmark program initialization. Use amber traces from PowerPC, and analyze them on sesc.
  • SPECint 1000 ILP (Instruction Level Parallelism). Assume ideal structures in the processor (perfect branch predictor, perfect memory...). Measure the ILP, and propose new optimizations (cascading units, value prediction, new compiler optimizations?) so that the ILP is highly improved.
  • Program views. Create user level fake TLB entries that trigger a program on access. For example: a sorted view from a set range of addresses. Views resemble SQL views in hardware.
  • Branch Prediction Championship. Evaluate a branch predictor (RAP). Do it like if you were submitting to the competition (if you are able to do it on time, extra credit).
  • (new) Implementing the paper "Picking Statistically Valid and Early Simulation Points" on sesc. Reproduce the same results shown in the paper.
  • (new) Two small projects instead of one big: (a) Propose a new benchmark for SPEC 2004. Evaluate in several architectures, simulators... (b) Optimize/port sesc for 64bit architectures and multimedia extensions. SESC runs in some 64bit architectures (PPC), but it does not run on opteron and EM64T.