CMPE 126: Advanced Logic Design

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CMPE 126 Syllabus

Course Description (from catalog)

Digital logic and system-level design using state-of-the-art FPGA tools. Students design large-scale logic circuits from fundamental building blocks and methods using design-automation tools. All examples and assignments use the Verilog Hardware Description Language with emphasis on FPGA systems.

Web Page

The course web page is at http://www.soe.ucsc.edu/classes/cmpe126/Spring08. It will be updated with the most recent course information, so please check it frequently.

Course Forum

Project and tool issues will be best answered in the UCSC SOE Course Forum for this class. Using the forum allows other students to see common problems and solution. It also gets you an answer faster so please check this forum before asking.

Important Dates

Midterm is on Wednesday, May 7 in class
Final exam is on Wednesday, June 13 7:30-10:30PM (standard scheduled time)

Prerequisites

100 and 100L, 70 and 70L; concurrent enrollment in course 126L. Students required to pass (an optional) computer engineering core exam in first week of class to remain enrolled.

Books

Verilog Styles for Synthesis of Digital Systems by David Richard Smith, Paul D. Franzon (ISBN: 0201618605)

Grading

Midterm (10%), Final (15%), Homework (35%), Project (40%)

The homework assignments will be a combination of written and computer projects. The computer projects will involve using CAD tools to design circuits, analyzing the results, and small lab write-ups.

Collaboration is strictly prohibited. You can ask someone about a problem to help understand it, but you cannot show them the answer or copy their answer.

Late homework and/or projects will be discounted at 25% per day. Weekends are included in this penalty per day (even though you cannot turn a homework in on Saturday/Sunday.) After 4 days, homeworks are 0%.

DRC

If you qualify for classroom accommodations because of a disability, please submit your Accommodation Authorization from the Disability Resource Center (DRC) to me during my office hours in a timely manner, preferably within the first two weeks of the quarter. Contact DRC at 459-2089 (voice), 459-4806 (TTY).