How to control and interact with the BORG from the PC

arbit - Run this program with argument p or x on the PC to control access to the 8K x 8 SRAM on the BORG board. With argument p, the PC is given access to the SRAM. Note that if the FPGAs on the BORG are not configured or if R2 is configured with a design that is driving the SRAM pins, this will still interfere with the PC'c access to the SRAM. With argument x, the FPGA R2 is given exclusive access to the SRAM. The arbit program is setting a bit in the X0 FPGA, so its effect will remain as long as the BORG board is powered on.

clock - Run this program with argument t,f,q or s on the PC to divide down the clock on the BORG board.
t - turbo divide by 1
f - fast divide by 2
q - quick divide by 4
s - slow divide by 8

inspect - This program will read and display the contents of the 8K x 8 SRAM on the BORG board. In order for the memory to be read correctly by the PC, access to the memory must be granted by running arbit and R2 FPGA must be configured with a design which does not drive the pins connected to the SRAM. Downloading an mcs file consisting of 4 empty bitstreams will ensure this.

The program borgmem.c reads and writes the SRAM on the BORG. Once the address mapping for the SRAM is setup, the 8K memory locations in the SRAM can be read or written using the type unsigned char.

You must use the Micro$oft build environment, Visual C

   Programs >> Development Kits >> Windows 2000 DDK >> Free Build Environments
and the proper devioctl.h I/O control header file and mapmem.h memory mapping header file.


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Copyright 2002; Department of Computer Engineering, University of California, Santa Cruz.
martine@cse.ucsc.edu