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	Lab 2: Building a Register File Due date Due Monday, July 6, at 8:00am Lab Objective In this two-part lab you will decode a hexadecimal input into its binary equivalent, and you will build a register file. You now have had a chance to play around with some basic logic combinational circuits. Let's move on to something a little more interesting: sequential logic. From class you learned that combinational logic is just a function of current inputs and that sequential logic was a function not only of current input, but some past sequence of inputs. To store that past sequence information we need some storage devices. In this lab you will build a memory with four 4-bit registers. You will add functionality to both read a four-bit number from a register, and write a 4-bit number into a particular register. You will allow a global reset that will reset all registers. So, let's get started. This lab, as a whole, may require extra time outside your lab section, so please start early. Lab tutors: Go over these topics Your lab tutor will cover the following topics in the first 40 minutes of lab. What is a binary number? ---> Answer Binary uses the weighted number system, which means that each digit (0 or 1) has a "weight," like in base ten. The weights of the binary digits, from right to left, are in powers of two (in base ten, they are in powers of ten). How do you convert from decimal to binary? ---> Answer There is a fun divide-by-two algorithm. You take your base-10 number and divide by two, each time remembering the remainder, until you get a quotient of 0. Reading the remainders backwards gives the binary number. How do you convert from binary to hexadecimal and back? ---> Answer Hexadecimal is base-16. The digits of hexadecimal are as follows. 0 1 2 3 4 5 6 7 8 9 a b c d e f, where a=10, b=11, c=12, d=13, e=14, and f=15 in base 10. It is a good idea to memorize the hex to decimal conversions. The hexadecimal prefix is "0x". We will be using it liberally throughout the quarter to indicate our use of hexadecimal numbers. Because 24=16, you can group a binary number's digits into groups of four. Each group of four is a hexadecimal digit. E.g., 00001010 grouped into fours is 0000 1010; each group is a hex digit. In this example, the hexadecimal equivalent of 0000 1010 is 0x0a. It is a good idea to memorize the binary to hex conversions. What is an asynchronous RESET signal? What is a register file? Tutors: Provide a basic block diagram of what is expected for this lab. Students: Make sure you show up early enough to hear our explanation of what is expected, and to copy down the block diagram. Signal sender and signal receiver tools Organizing the design into multiple pages Lab 2: Building a Register File You will build a memory device called a register file. You will have four registers in the memory, and each register will store four bits. You will only access one of the four registers at a time (thus reads and writes are always 4 bits in size). If you are reading, the result should be stored in a set of 4 flip-flops; the output should be connected to a display readout. Note that the display should only change when a read is done, not when a write is done. What's required The lab files (.lgi) for parts all parts of the lab assignment, and a lab report that includes discussion of all parts of the lab assignment. Materials You may need at least the following components. This is a partial list; yours may be different. Clock (button) to clock the registers Reset (button) to asynchonously reset all registers Keypad for user input Write enable signal (switch) to differentiate between reads and writes Address select signals (switches) to differentiate between registers (if you like, this may be two signals -- one for reads, one for writes) Decoder for register selection Four 1-bit edge-triggered flip-flops (memory bank 0) Four 1-bit edge-triggered flip-flops (memory bank 1) Four 1-bit edge-triggered flip-flops (memory bank 2) Four 1-bit edge-triggered flip-flops (memory bank 3) Multiplexer for output selection 7-segment display Procedure Open a new schematic named lab2-registerfile.lgi. Consider now what your design will look like. Organize your design into multiple pages (like layers). Draw it out on paper. Your lab tutor may not help you if you haven't brainstormed on paper first! The first page of your design should contain all of your I/O (input/output) -- everything that interacts with the user (you). Another one or more pages should have address decode logic, register file, and remaining logic. You may reference examples\Devices\signal.lgi for an example of using the signal sender and signal receiver tools. Add a clock button. The registers and displays are all clocked, or synchronized. Add a global reset button. Resetting the system should reset all registers and displays to 0. Add the keypad and a 7-segment display to the keypad so you always know what was just entered. Add the address select switches (to select the 0, 1, 2, or 3 register bank). This is what we call the address decode logic. Add the decoder. You need a 2-to-4 decoder which will assert one of the four lines based on the two-bit input. Warning: the decoder's asserted outputs are inverted. Figure 4 shows the input of 2 base 10 de-asserting the 2nd line. Add read/write switch (to select the operation). This is the control logic. Add the 7-segment display for read results. Add the four register banks as four sets of four D-flip-flops. Figure 5 shows how to add a latch, and Figure 6 shows how to modify the latch to make it a D-latch with preset and clear signals (clear is built in, and will be your reset). Also, check the edge-triggered checkbox to create an edge-triggered D-latch, or flip-flop. Add all the intermediate logic to make your lab work. This includes both control and data logic, including but not limited to the following. Decode logic to select the register bank Logic to select read/writing Logic to carry clock signal Logic to carry reset signal Data lines to carry data to and from I/O to the registers Demonstrate your lab to the TA/Tutor when finished to get it checked off. (optional) Submit lab2-registerfile.lgi into your tutor's locker when you are finished. Figure 4: A decoder's outputs are inverted Figure 5: Adding a latch Figure 6: Making a D-latch with preset and clear signals Desired functionality Your circuit should function as follows. You can read from each register individually by selecting "Read," selecting the register, and pressing the clock button. The result is displayed on the 7-segment display. You can write to each register individually by selecting "Write," selecting the register, entering a number on the keypad, and pressing the clock button. You can clear all latches asynchonously (at the same time, and regardless of the clock) using the clear button. The state of the registers changes only when the clock or reset buttons are pressed. The read-output display only changes when a read occurs. Notes Feel free to use other materials than those listed here. It may make your design more understandable or fun! When you are done, your design should look clean and neat on the first page, with all underlying logic on pages underneath. You should be able to read and write from the register files, and see exactly what's happening by what's on the displays. You can see what my interface looks like. Refer to Figure 7. Figure 7: Fire's lab 2 implementation (first page only -- the input and output) Grading template This is a suggested grading rubrik. Your tutor may or may not use this rubric to grade by, but it is a good general guideline before submitting your lab to check off these points. Register file requirements (30 points) Address decoding network is correct Four registers with 4 bits each: implementation is correct, with edge-triggered D flip-flops Ability to read from each register bank using read signal and clock Read changes value on data output 7-segment display Ability to write to each register bank using write signal and clock Write does not change value on output 7-segment display Reset signal works as intended Design is organized on multiple pages 30 points total Lab write-up requirements In the lab write-up, we will be looking for the following things. The lab report is worth 12 points. We do not break down the point values; instead, we will assess the lab report as a whole while looking for the following content in the report. What is the clock signal used for? How is sequential logic useful; i.e., why are the inputs and outputs latched? How did you tell the register banks which operation to perform, and to which bank? 12 points total
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